(源码在问题下面)
我的问题是 在while(_iicDataCount!=-1);时等待中断函数处理,进入中断
case WRDATA:
if((_iicDataCount--)==0)
{
rIICSTAT = 0xd0; //Stop MasTx condition
rIICCON = 0xaf; //Resumes IIC operation
Delay(1); //Wait until stop condtion is in effect
//The pending bit will not be set after issuing stop condition.
break;
}
rIICDS = _iicData[_iicPt++]; //_iicData[0] has dummy.
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
break;
第一次_iicDataCount==2, 执行_iicDataCount--后_iicDataCount==1,然后执行rIICDS = _iicData[_iicPt++]; 及以后的语句, 完成写地址
第二次_iicDataCount==1,执行_iicDataCount--后_iicDataCount==0,然后执行
rIICSTAT = 0xd0;
rIICCON = 0xaf;
然后产生停止信号, 此时_iicDataCount==0,岂不是一直执行while(_iicDataCount!=-1)
疑问就在这了,数据是什么时候写进去的, 唯一的解释就是又产生了一次中断_iicDataCount==-1,写数据到存储器,可是IIC不是已经产生终止了信号了,怎么又会写数据,请大家帮忙解释下
void Wr24C080(U32 slvAddr,U32 addr,U8 data)
{
_iicMode = WRDATA; //IIC操作模式
_iicPt = 0;
_iicData[0] = (U8)addr; //将目标地址写入缓冲区_iic_iicData[0]
_iicData[1] = data; //将目标数据写入缓冲区_iic_iicData[1]
_iicDataCount = 2;
rIICDS = slvAddr; //0xa0
rIICSTAT = 0xf0; //MasTx,Start 主发送模式,写开始信号产生
//Clearing the pending bit isn't needed because the pending bit has been cleared.
while(_iicDataCount!=-1);
_iicMode = POLLACK;
//判断是否有应答信号
while(1)
{
rIICDS = slvAddr;
_iicStatus = 0x100;
rIICSTAT = 0xf0; //MasTx,Start
rIICCON = 0xaf; //Resumes IIC operation. 中断产生
while(_iicStatus==0x100);
if(!(_iicStatus&0x1))
break; //When ACK is received
}
rIICSTAT = 0xd0; //Stop MasTx condition
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
//Write is completed.
}
void __irq IicInt(void)
{
U32 iicSt,i;
rSRCPND = BIT_IIC; //Clear pending bit
rINTPND = BIT_IIC;
iicSt = rIICSTAT;
if(iicSt & 0x8){} //When bus arbitration is failed.
if(iicSt & 0x4){} //When a slave address is matched with IICADD
if(iicSt & 0x2){} //When a slave address is 0000000b
if(iicSt & 0x1){} //When ACK isn't received
switch(_iicMode)
{
case POLLACK:
_iicStatus = iicSt;
break;
case RDDATA:
if((_iicDataCount--)==0)
{
_iicData[_iicPt++] = rIICDS;
rIICSTAT = 0x90; //Stop MasRx condition
rIICCON = 0xaf; //Resumes IIC operation.
Delay(1); //Wait until stop condtion is in effect.
break;
}
_iicData[_iicPt++] = rIICDS; //The last data has to be read with no ack.
if((_iicDataCount)==0)
rIICCON = 0x2f; //Resumes IIC operation with NOACK.
else
rIICCON = 0xaf; //Resumes IIC operation with ACK
break;
case WRDATA:
if((_iicDataCount--)==0)
{
rIICSTAT = 0xd0; //Stop MasTx condition 发送停止信号
rIICCON = 0xaf; //Resumes IIC operation. 恢复IIC操作
Delay(1); //Wait until stop condtion is in effect.起作用
//等待停止信号
//The pending bit will not be set after issuing stop condition.
break;
}
rIICDS = _iicData[_iicPt++]; //_iicData[0] has dummy.
for(i=0;i<10;i++); //for setup time until rising edge of IICSCL
rIICCON = 0xaf; //resumes IIC operation.
break;
case SETRDADDR:
if((_iicDataCount--)==0)
break; //IIC operation is stopped because of IICCON[4]
rIICDS = _iicData[_iicPt++];
for(i=0;i<10;i++); //For setup time until rising edge of IICSCL
rIICCON = 0xaf; //Resumes IIC operation.
break;
default:
break;
}
}